A collection of FPGA and AI experiments, from concept to implementation.
High-performance 256x256 bit multiplier using the Karatsuba algorithm, optimized for cryptographic applications on Xilinx UltraScale+ FPGAs.
Hardware implementation of a convolutional neural network inference engine with quantized weights and optimized memory access patterns.
Custom RISC-V implementation with a focus on minimal resource usage and maximum clock frequency on 7-series FPGAs.
High-throughput PCIe Gen3 DMA controller for efficient data transfer between host memory and FPGA fabric.
FPGA-accelerated token generation for large language models, exploring hardware optimization for transformer architectures.
secp256k1 elliptic curve point multiplication accelerator for cryptocurrency and digital signature applications.